For the occasions that you find yourself with a netlist file and you don’t know where it came from or what version it is, etc. this post is about how you can interpret the netlist file (ie. convert it into something readable).

Today I found myself with two netlists and I needed to know if they were the same. Yes of course you can try comparing the two files with a program such as Beyond Compare, but if the netlists were compiled on separate dates, you will have trouble recognizing this from the raw binary data. The best thing to do in this case is to convert the netlists to EDIF files, a readable, text file version of the netlist. Another option is to convert the netlists into VHDL or Verilog code. Here is how you can do this:

To convert a netlist (.ngc) to an EDIF file (.edf)

1. Get a command window open by typing “cmd” in the Start->Run menu option in Windows. If you use Linux, open up a terminal window.
2. Use the “cd” command to move to the folder in which you keep your netlist.
3. Type “ngc2edif infilename.ngc outfilename.edf” where infilename and outfilename correspond to the input and output filenames respectively.
4. Open the .edf file with any text editor to view the netlist.

To reverse engineer a netlist with ISE versions older than 6.1i

1. Convert the netlist to an EDIF file using the above instructions.
2. Type “edif2ngd filename.edf filename.ngd” to convert the EDIF file into an NGD file (Xilinx Native Generic Database file).
3. To convert the netlist into VHDL type “ngd2vhdl filename.ngd filename.vhd“.
4. To convert the netlist into Verilog type “ngd2ver filename.ngd filename.v“.

To reverse engineer a netlist with ISE versions 6.1i and up

1. To convert the netlist into VHDL type “netgen -ofmt vhdl filename.ngc“. Netgen will create a filename.vhd file.
2. To convert the netlist into Verilog type “netgen -ofmt verilog filename.ngc“. Netgen will create a filename.v file.

Now you should have all the tools you need to read an NGC netlist file.

Back in 2009 I did a presentation on why companies needed to be using FPGAs in their high frequency trading:

1. Stop competing in the arms race

Profits for being first to the game are over. Hardware will advance more quickly than you can develop strategies to run on it. Don’t compete in the arms race unless you can buy out Xilinx or Altera.

2. Stop focusing on speed of execution

Trying to get your order out faster than anyone else is a crowded game. Find intelligent strategies rather than fast and stupid strategies. Use FPGAs for what they are good at: fast parallel number crunching. Focus on processing market data to find trade opportunities, not on crunching protocols to save 2 microseconds.

3. Leverage existing hardware

Don’t waste your time developing your own custom hardware. The kind of hardware used in high frequency trading costs too much money to develop and involves too much risk (ironically). But the main problem is the development lead time which means that by the time you can trade on it you can buy something else which is cheaper and faster.

4. Use more data

The next profits will come from FPGA trading platforms that process data streams coming from everywhere and everything. Bring together data from a multitude of sources that are not yet being looked at and find the intercorrelations that can only be exploited by the speed of an FPGA.

Here is a recent presentation I made on outsourcing FPGA design work.