<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>KCU116 on FPGA Developer</title><link>https://www.fpgadeveloper.com/boards/kcu116/</link><description>Recent content in KCU116 on FPGA Developer</description><generator>Hugo</generator><language>en-US</language><copyright>Copyright (c) 2024-2026 FPGA Developer</copyright><lastBuildDate>Wed, 04 Nov 2026 00:00:00 +0000</lastBuildDate><atom:link href="https://www.fpgadeveloper.com/boards/kcu116/index.xml" rel="self" type="application/rss+xml"/><item><title>FPGA to GPU over 100G RoCE: a live beamforming demo</title><link>https://www.fpgadeveloper.com/fpga-to-gpu-beamforming-100g-roce/</link><pubDate>Wed, 04 Nov 2026 08:00:00 -0500</pubDate><guid>https://www.fpgadeveloper.com/fpga-to-gpu-beamforming-100g-roce/</guid><description>Our open-source RoCE v2 engine streams a simulated 8x8 phased array from a KCU116 straight into GPU memory</description></item></channel></rss>