<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Aurora on FPGA Developer</title><link>https://www.fpgadeveloper.com/tags/aurora/</link><description>Recent content in Aurora on FPGA Developer</description><generator>Hugo</generator><language>en</language><copyright>Copyright (c) 2024-2026 FPGA Developer</copyright><lastBuildDate>Thu, 24 Sep 2009 00:00:00 +0000</lastBuildDate><atom:link href="https://www.fpgadeveloper.com/tags/aurora/index.xml" rel="self" type="application/rss+xml"/><item><title>Aurora to Ethernet Bridge</title><link>https://www.fpgadeveloper.com/2009/09/aurora-to-ethernet-bridge.html</link><pubDate>Thu, 24 Sep 2009 00:00:00 +0000</pubDate><guid>https://www.fpgadeveloper.com/2009/09/aurora-to-ethernet-bridge.html</guid><description>Bridge the Tri-mode Ethernet MAC and Aurora core to link two PCs over a high-speed serial connection</description></item><item><title>Generating Clock Domain Crossing FIFOs</title><link>https://www.fpgadeveloper.com/2009/09/generating-clock-domain-crossing-fifos.html</link><pubDate>Wed, 23 Sep 2009 00:00:00 +0000</pubDate><guid>https://www.fpgadeveloper.com/2009/09/generating-clock-domain-crossing-fifos.html</guid><description>Generate FIFOs with independent clocks and non-symmetric widths for crossing clock domains</description></item><item><title>Generating the Aurora Core</title><link>https://www.fpgadeveloper.com/2008/10/generating-aurora-core.html</link><pubDate>Sat, 18 Oct 2008 00:00:00 +0000</pubDate><guid>https://www.fpgadeveloper.com/2008/10/generating-aurora-core.html</guid><description>Generate an Aurora IP core for high-speed serial communication using Xilinx CORE Generator 10.1</description></item><item><title>Aurora Transceiver for the PLB</title><link>https://www.fpgadeveloper.com/2008/04/aurora-transceiver-for-plb.html</link><pubDate>Tue, 01 Apr 2008 00:00:00 +0000</pubDate><guid>https://www.fpgadeveloper.com/2008/04/aurora-transceiver-for-plb.html</guid><description>Improved Aurora transceiver connected to the PLB for faster DMA-based data transfer on the XUPV2P</description></item><item><title>Create an Aurora Transceiver</title><link>https://www.fpgadeveloper.com/2008/03/create-aurora-transceiver.html</link><pubDate>Wed, 19 Mar 2008 00:00:00 +0000</pubDate><guid>https://www.fpgadeveloper.com/2008/03/create-aurora-transceiver.html</guid><description>Build an Aurora-based 1.5Gbps serial transceiver peripheral using RocketIO MGTs on the XUPV2P</description></item></channel></rss>