HFT on FPGA Developerhttps://www.fpgadeveloper.com/topics/hft/Recent content in HFT on FPGA DeveloperHugoenCopyright (c) 2024-2026 FPGA DeveloperSun, 30 Jun 2013 00:00:00 +0000Nallatech Releases FPGA Boards for High Frequency Tradinghttps://www.fpgadeveloper.com/2013/06/nallatech-releases-fpga-boards-for-high-frequency-tradin-2.htmlSun, 30 Jun 2013 00:00:00 +0000https://www.fpgadeveloper.com/2013/06/nallatech-releases-fpga-boards-for-high-frequency-tradin-2.htmlNallatech’s OpenCL-compatible Stratix V PCIe boards designed for financial tradingNallatech Releases FPGA Boards for High Frequency Tradinghttps://www.fpgadeveloper.com/2013/06/nallatech-releases-fpga-boards-for-high-frequency-tradin.htmlSun, 30 Jun 2013 00:00:00 +0000https://www.fpgadeveloper.com/2013/06/nallatech-releases-fpga-boards-for-high-frequency-tradin.htmlNallatech’s OpenCL-compatible Stratix V PCIe boards targeting the finance marketFPGAs in High Frequency Tradinghttps://www.fpgadeveloper.com/2011/08/fpgas-in-high-frequency-trading.htmlTue, 09 Aug 2011 00:00:00 +0000https://www.fpgadeveloper.com/2011/08/fpgas-in-high-frequency-trading.htmlReflections on using FPGAs in high-frequency trading and advice on strategy over speedJP Morgan applies FPGA to risk managementhttps://www.fpgadeveloper.com/2011/07/jp-morgan-applies-fpga-to-risk-management.htmlTue, 12 Jul 2011 00:00:00 +0000https://www.fpgadeveloper.com/2011/07/jp-morgan-applies-fpga-to-risk-management.htmlJP Morgan uses FPGAs to reduce risk analysis run time from eight hours to seconds