<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>News on FPGA Developer</title><link>https://www.fpgadeveloper.com/topics/news/</link><description>Recent content in News on FPGA Developer</description><generator>Hugo</generator><language>en</language><copyright>Copyright (c) 2024-2026 FPGA Developer</copyright><lastBuildDate>Tue, 19 May 2026 00:00:00 +0000</lastBuildDate><atom:link href="https://www.fpgadeveloper.com/topics/news/index.xml" rel="self" type="application/rss+xml"/><item><title>Takeaways from FPGA Horizons US East 2026</title><link>https://www.fpgadeveloper.com/takeaways-fpga-horizons-us-east-2026/</link><pubDate>Tue, 19 May 2026 00:00:00 +0000</pubDate><guid>https://www.fpgadeveloper.com/takeaways-fpga-horizons-us-east-2026/</guid><description>AMD&amp;rsquo;s agentic AI workflow, Samtec&amp;rsquo;s new oHFM standard, and Lattice&amp;rsquo;s case for AI on the edge</description></item><item><title>Introducing the FPGA Board Repository</title><link>https://www.fpgadeveloper.com/introducing-fpga-board-repo/</link><pubDate>Mon, 20 Apr 2026 00:00:00 +0000</pubDate><guid>https://www.fpgadeveloper.com/introducing-fpga-board-repo/</guid><description>Find, Compare and Submit FPGA dev boards</description></item><item><title>The MCIO PCIe FMC Relaunch</title><link>https://www.fpgadeveloper.com/mcio-pcie-fmc-relaunch/</link><pubDate>Thu, 16 Apr 2026 00:00:00 +0000</pubDate><guid>https://www.fpgadeveloper.com/mcio-pcie-fmc-relaunch/</guid><description>Now With Host and Device Mode in One Board</description></item><item><title>My Thoughts on Agentic AI</title><link>https://www.fpgadeveloper.com/my-thoughts-on-agentic-ai/</link><pubDate>Wed, 18 Mar 2026 00:00:00 +0000</pubDate><guid>https://www.fpgadeveloper.com/my-thoughts-on-agentic-ai/</guid><description>What&amp;rsquo;s next for us FPGA developers?</description></item><item><title>Ethernet Mezzanine for Ultra96</title><link>https://www.fpgadeveloper.com/2019/06/ethernet-mezzanine-for-ultra96.html</link><pubDate>Wed, 12 Jun 2019 00:00:00 +0000</pubDate><guid>https://www.fpgadeveloper.com/2019/06/ethernet-mezzanine-for-ultra96.html</guid><description>Short video introduction to the 96B Quad Ethernet Mezzanine for Ultra96</description></item><item><title>Introducing 96B Quad Ethernet Mezzanine</title><link>https://www.fpgadeveloper.com/2019/02/introducing-96b-quad-ethernet-mezzanine.html</link><pubDate>Mon, 18 Feb 2019 00:00:00 +0000</pubDate><guid>https://www.fpgadeveloper.com/2019/02/introducing-96b-quad-ethernet-mezzanine.html</guid><description>Announcing a 4-port Gigabit Ethernet mezzanine card designed for the Ultra96 board</description></item><item><title>Avnet Silica's industrial networking demo features Ethernet FMC</title><link>https://www.fpgadeveloper.com/2018/03/avnet-silicas-industrial-networking-demo-features-ethernet-fmc.html</link><pubDate>Sat, 17 Mar 2018 00:00:00 +0000</pubDate><guid>https://www.fpgadeveloper.com/2018/03/avnet-silicas-industrial-networking-demo-features-ethernet-fmc.html</guid><description>Avnet Silica demos TSN and industrial networking on the Ethernet FMC at Embedded World 2018</description></item><item><title>IntelliProp Demos NVMe Host Accelerator on FPGA Drive</title><link>https://www.fpgadeveloper.com/2018/02/intelliprop-demos-nvme-host-accelerator-on-fpga-drive.html</link><pubDate>Mon, 26 Feb 2018 00:00:00 +0000</pubDate><guid>https://www.fpgadeveloper.com/2018/02/intelliprop-demos-nvme-host-accelerator-on-fpga-drive.html</guid><description>IntelliProp demonstrates 3200 MB/s read speeds with their NVMe IP on an Intel Arria 10 and FPGA Drive</description></item><item><title>Quick look at the UltraZed-EG SoM</title><link>https://www.fpgadeveloper.com/2017/10/quick-look-at-the-ultrazed-eg-som.html</link><pubDate>Tue, 24 Oct 2017 00:00:00 +0000</pubDate><guid>https://www.fpgadeveloper.com/2017/10/quick-look-at-the-ultrazed-eg-som.html</guid><description>Overview of the UltraZed-EG System-on-Module and Zynq UltraScale+ MPSoC features</description></item><item><title>A quick look at the Kintex Ultrascale KCU105</title><link>https://www.fpgadeveloper.com/2017/01/a-quick-look-at-the-kintex-ultrascale-kcu105.html</link><pubDate>Sat, 21 Jan 2017 00:00:00 +0000</pubDate><guid>https://www.fpgadeveloper.com/2017/01/a-quick-look-at-the-kintex-ultrascale-kcu105.html</guid><description>Unboxing and exploring the features of the Kintex Ultrascale KCU105 evaluation board</description></item></channel></rss>