Your FPGA designs can be copied onto a compact flash card and loaded automatically when your ML50x/XUPV5 board is turned ON. The configuration DIP switch (SW3), located in the top left hand corner of the board, determines which design the FPGA is loaded with when the board is turned ON.

Before understanding how to use these switches, we must first take a look at how the flash disk contents are structured.

Flash Disk Contents

The folder structure of the flash disk contents is shown in the screenshots below. The root folder can contain different files that are not necessarily used for configuration. We are interested in the folder for placing our FPGA designs which is called “ML50x”.






As can be seen in the screenshots, the “ML50x” folder contains eight configuration folders (cfg0 to cfg7). These configuration folders are used to store eight separate FPGA designs. There must only be ONE design per folder, and it must be in SystemACE (.ACE) format. To learn how to convert your bit files into SystemACE files, refer to this tutorial: Convert Bit Files to System ACE Files.

How to load a design from Compact Flash

To load a design from compact flash, follow these instructions:

  1. Copy a design in SystemACE format (.ace) into one of the “cfg0-7” folders on the flash disk. Ensure that the .ace file that was previously in that folder has been either deleted or renamed to another extension (ie. “previous.bak”).
  2. Set the configuration DIP (SW3) switches 4 to 8 to “10101”. This sets the hardware to load the FPGA using the compact flash.
  3. Set the configuration DIP (SW3) switches 1 to 3 to the design you want to use. For example, if you want to load the design in folder “cfg0”, you would set “000”, alternatively if you want to load “cfg4” you would set “100”.
  4. Ensure that the flash disk is properly inserted into your board and then turn the board ON.


As a final example, if I had copied my “project.ace” file into the “cfg3” folder, I would have set my SW3 settings to “01110101” (from 1 to 8).

Jeff is passionate about FPGAs, SoCs and high-performance computing, and has been writing the FPGA Developer blog since 2008. As the owner of Opsero, he leads a small team of FPGA all-stars providing start-ups and tech companies with FPGA design capability that they can call on when needed.

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