Hands down, the best solution for non-volatile storage on Versal designs, is NVMe solid-state drives. One of the main reasons why they are such a good fit is because they interface with the host device over PCI Express. Versal Prime, AI Core and AI Edge devices all have integrated PCIe blocks, and most of them are PCIe Gen5 compliant. This means that there are no extra IP costs to connect an NVMe SSD to the Versal devices because everything you need is already built into the device.
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Quick look at Ethernet FMC Max
Opsero's new gigabit Ethernet FMC with SGMII
Ten years ago, almost to the day, I launched the Opsero Ethernet FMC. To my delight and surprise, many of our customers are still buying them today. Gigabit Ethernet still finds many uses in FPGA designs today, because it is simple to setup, the cabling is easy to buy and install, the throughput is ample for many applications and it is extremely versatile.
This year, I felt that it was time to upgrade our Ethernet FMC offering, so we’ve launched two new products: Quad SFP28 FMC which I have introduced to you in earlier posts (here and here), and Ethernet FMC Max, which I would like to introduce to you in this post.
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Multi-port 25G Ethernet on Versal ACAP
A reference design that you can build and test
In this post we’re going to build and run our new multi-port 25G Ethernet reference design for Versal boards and the Opsero Quad SFP28 FMC. The design is based on the AMD Xilinx 10G/25G Ethernet Subsystem IP. Specifically, we’re going to boot PetaLinux on the VEK280 and establish a 25G Ethernet connection between it and a 25G network adapter that is installed in a Ubuntu PC. We’re doing this on Versal board VEK280 which is one of the few AMD FPGA-containing devices that can support 25G Ethernet at the time of writing.
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Introducing the Quad SFP28 FMC
High-speed Ethernet connectivity for FPGAs
In the next few days I will kick off the launch of another new Opsero FMC product: the Quad SFP28 FMC. This FMC card has 4x SFP28 slots that are compatible with SFP, SFP+ and SFP28 modules. The FMC and the reference designs that we are currently developing will enable 4x 10G/25G Ethernet links on a multitude of FPGA/MPSoC/RFSoC development boards including the newer Versal ACAP boards. We’ve already pushed working 10G/25G designs to the Github repo for the ZCU104, ZCU102, ZCU106, ZCU111 and ZCU208 with more coming soon.
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How to Install Vitis and PetaLinux 2024.1
For Ubuntu 20.04
Here we go again. In this post I’m going to go through the steps of installing Vitis and PetaLinux 2024.1. Unfortunately I have to go through this process on a regular basis. Installing dev tools like this from the biggest FPGA vendor in the world should be easy but for some reason there are always problems - hence the need to keep notes.
The image that I used for this post was generated by ChatGPT.
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The M.2 M-key Stack FMC Unveiled
A fresh approach to getting more from FMC
The FPGA Mezzanine Card standard (VITA 57.1) has significantly enhanced the FPGA ecosystem by decoupling the FPGA board from the input/output components. Years ago, if you wanted to process samples from an ADC, you would buy an FPGA board with an on-board ADC. If you wanted to add a DAC, or upgrade the ADC, you would replace the entire board! The FMC innovation provided developers with choice, so that they could select the right FPGA for their specific I/O requirements.
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Enabling VADJ on Versal VCK190 and VMK180
Important This workaround is applicable to the VCK190, VMK180 and VPK120 because they all use the same circuitry for generating the VADJ voltage: an IR38164 buck regulator with the same I2C address (0x1E), connecting to the same port of the same I2C switch (address 0x74, port 0) and connecting to the same I2C pins of the Versal device (PMC MIO46/47).
Note that this workaround is NOT applicable to the VEK280 because that board applies a fixed VADJ voltage of 1.
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Using NVMe SSDs with Versal VCK190 and VMK180
High-capacity non-volatile storage is pretty handy in the intensive computing applications that the Versal ACAP adaptive SoCs get employed in. NVMe SSDs are a perfect way to provide that storage because they can directly interface with the Versal’s integrated blocks for PCIe. Those integrated blocks are Gen4 compliant which makes for an extremely high bandwidth connection between the FPGA fabric and the storage medium.
Over the past couple of weeks, my team and I have been bringing up an NVMe SSD on the Versal AI Core VCK190 Evaluation kit using the FPGA Drive FMC Gen4 adapter.
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Multi-camera YOLOv5 on Zynq UltraScale+ with Hailo-8 AI Acceleration
See it live: The demo described in this post will be displayed live at the EBV Elektronik booth at Embedded World 2024 on April 9-11. I’ll be attending too, so get in touch if you’re keen to meet up. Over the last few months I’ve been lucky to work with two very talented people on an interesting project for multi-camera machine vision applications: Gianluca Filippini and Mario Bergeron. Back in 2022, I was contacted by Gianluca, an engineer from EBV Elektronik.
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Change the temp folder used by PetaLinux
When working with PetaLinux tools, we need to be wary of the often very sizeable temporary files generated during builds. These temporary files can often take up more than 10GB, and they are crucial for the build process.
By default, PetaLinux tools create a temporary folder internal to the project directory. Having it set this way is useful because our projects are well contained and we have clear insight into the total disk space used by a project.
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