Virtex® UltraScale™ XCVU095-2FFVA2104E FPGA


An onboard system controller reads FRU data on the EEPROM of the connected FMC card, and sets the VADJ voltage accordingly. Supported VADJ voltages are 1.2V, 1.5V and 1.8V.


Boot mode is determined by DIP switch SW16.

Config mode 1 2 3 4 5
Master BPI x x 0 1 0
JTAG x x 1 0 1

Switches 1 and 2 determine which of four possible configuration bitstreams to load from Master BPI flash. They are connected to A25 and A24 of the flash memory.

Processorless Ethernet: Part 3

State machine based Ethernet on FPGA

Processorless Ethernet: Part 3
For those of you who want to experiment with processorless Ethernet on FPGAs, I’ve just released a 4-port example design that supports these Xilinx FPGA development boards: Artix-7 AC701 Evaluation board Kintex-7 KC705 Evaluation board Kintex Ultrascale KCU105 Evaluation board Virtex-7 VC707 Evaluation board Virtex-7 VC709 Evaluation board Virtex UltraScale VCU108 Evaluation board Virtex UltraScale+ VCU118 Evaluation board Here’s the Git repo for the project: Processorless Ethernet on FPGA [Read More]