A tech blog on FPGA design by Jeff Johnson
Analyzing Xilinx's competitive position versus Altera using market trends and search data
July 5, 20111 minute
Tutorial on reading DIP switches and displaying their state using a Microblaze C application
July 5, 20115 minutes
A look at the ML605 evaluation board and its FMC expansion connectors for high-throughput I/O
July 1, 20112 minutes
How to convert and inspect NCD files using the XDL tool and FPGA Editor
June 30, 20114 minutes
Best practices for version-controlling HDL designs with SVN, including which files to commit
June 29, 20113 minutes
Tutorial on writing a Microblaze software application using Xilinx SDK 13.1
June 28, 20114 minutes
Using the KEEP constraint in VHDL and Verilog to preserve signal names through synthesis
June 27, 20112 minutes
A visual guide to navigating the Xilinx Platform Studio (XPS) version 13.1 interface
June 25, 20113 minutes
Why omitting SIGIS = CLK in your EDK MPD file causes clock-related debugging headaches
June 23, 20114 minutes
An introduction to the FMC standard and how it enables modular FPGA I/O design
June 23, 20113 minutes