Below are several frequently asked questions about the ML505/6/7 and XUPV5 boards. Click on the question to jump to the answer. If you have a question about the ML505/6/7 or XUPV5 boards, please contact us at the email address given at the end of this page.

 

What is the speed grade of Virtex-5 on my ML505/ML506/ML507/XUPV5 board?

All the ML505/6/7 and XUPV5 boards use a Virtex-5 of speed grade -1.

 

What are the differences between the ML50x boards?

The ML505 has been made in four variations that use the same printed-circuit-board (PCB) but a different version Virtex-5. The table below lists the different boards and the Virtex-5 it is loaded with:

Board Virtex-5 Version Package Speed Grade
ML505 XC5VLX50T FFG1136 -1C
ML506 XC5VSX50T FFG1136 -1C
ML507 XC5VFX70T FFG1136 -1C
XUPV5 XC5VLX110T FFG1136 -1C

For more information, please refer to the ML505/ML506/ML507 Evaluation Platform User Guide.

 

What is the XUPV5 (ML509) board?

The XUPV5 board is a version of the ML505 offered by the Xilinx University Program (XUP). It uses the same printed-circuit-board (PCB) as the ML505 but a Virtex-5 XC5VLX110T rather than the XC5VLX50T. It is also known as the ML509 board because it is labeled so. The board is popular because it can be purchased from Digilent for only US$750.


Why cant I find the XUPV5 (or ML509) board in the Base System Builder (BSB)?

The XUPV5 was only recently released. It should eventually be added to future versions of the EDK. Until then, you can instead select the ML505 board in the BSB and then use “Project->Project Options” to change the Virtex-5 version to the correct one for the XUPV5 board. You may also have to change your constraints file (.ucf) if you use it to specify the FPGA or if you are instantiating RocketIO GTPs. See next question.

 

I have a design for an ML50x board (eg. ML505) that I want to migrate to a different ML50x board (eg. ML509). What do I have to change?

Firstly use “Project->Project Options” to change the Virtex-5 version to the correct one for the board you are migrating to. You may also have to change your constraints file (.ucf) if you use it to specify the FPGA or if you are instantiating RocketIO GTPs. The GTP placement names for one version of Virtex-5 do not necessarily refer to the same GTPs on another Virtex-5. For this reason, you might have to change your .ucf file to specify the correct GTPs that you want to use. Use the table below to ensure that you are using the correct placement names for the board that you are using.

ML505 ML506 ML507 XUPV5
XC5VLX50T XC5VSX50T XC5VFX70T XC5VLX110T
SFP/SMA (BANK116) GTP_DUAL X0Y4 GTP_DUAL X0Y4 GTX_DUAL X0Y5 GTP_DUAL X0Y5
SGMII (BANK112) GTP_DUAL X0Y3 GTP_DUAL X0Y3 GTX_DUAL X0Y4 GTP_DUAL X0Y4
SATA (BANK114) GTP_DUAL X0Y2 GTP_DUAL X0Y2 GTX_DUAL X0Y3 GTP_DUAL X0Y3
PCIe (BANK118) GTP_DUAL X0Y1 GTP_DUAL X0Y1 GTX_DUAL X0Y2 GTP_DUAL X0Y2

 

The banks and their corresponding placement names can be found in the RocketIO User Guides. Refer to “Package Placement Information” in Chapter 4 of the appropriate RocketIO User Guide for your board:

 

The Virtex-5 on my ML50x board gets very hot when in use. What should I do about it?

The Virtex-5 FPGA is a very powerful device that will naturally generate heat when in operation. Several Xilinx application notes suggest using a heatsink/fan with the ML505 board to reduce the overheating problem.

A suitable heatsink/fan can be purchased from Radian Heatsinks. A full list of compatible heatsinks can be found at the link below:

http://www.radianheatsinks.com/docs/virtex-chart.pdf

Other suitable and cost effective heatsinks can be purchased from Digilent. See the list of them in the “Related Products” section of the XUPV5 page.

 

How can I buy an ML50x board and how much does it cost?

  1. The ML505/ML506/ML507 can be purchased from Xilinx for the price of US$1,195.
  2. As an option for universities, the Xilinx University Program offers a version of the board known as the XUPV5 (or ML509). It can be purchased from Digilent for US$750.

 

Jeff is passionate about FPGAs, SoCs and high-performance computing, and has been writing the FPGA Developer blog since 2008. As the owner of Opsero, he leads a small team of FPGA all-stars providing start-ups and tech companies with FPGA design capability that they can call on when needed.

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