Here’s a peek at the first units of the SERDES FMCs, the first low pin-count FPGA Mezzanine Card to enable multi-gigabit transceivers on the ZedBoard and other FPGA boards that don’t have internal MGTs. The first board is designed for SFP modules for Ethernet and optical applications whereas the second board has SATA connectors for custom applications. Both boards are compliant to the VITA 57 standard.

Stay tuned for the performance results this week!


If you want more information on either board, don’t hesitate to contact me.

Jeff is passionate about FPGAs, SoCs and high-performance computing, and has been writing the FPGA Developer blog since 2008. As the owner of Opsero, he leads a small team of FPGA all-stars providing start-ups and tech companies with FPGA design capability that they can call on when needed.

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