ZC706 Evaluation Board

One of my most common customer requests is to speed up execution of a software application using FPGA hardware acceleration. If the application runs on a PC or server, you can achieve impressive performance gains by using off-the-shelf FPGA development boards for PCI Express.

Here is a comparison of the available 7 Series FPGA boards for PCI Express applications:

• (*) Note: These HPC FMC connectors are only partially populated which means that they wont be able to support all standard FMCs.
• There are many more FPGA boards for PCIe on the market, but I chose to limit the comparison to those that are more strongly supported by Xilinx.

The reason these types of boards are so useful in the hardware acceleration space is because PCI Express is the highest bandwidth, lowest latency link that you can have between a PC’s CPU and an external FPGA. There’s no use shipping off work to an FPGA if the time it takes the data to get there and back is more than the time saved through improved processing efficiency.

If you’re interested in testing out the Zynq-7000 SoC from Xilinx there are now quite a few options available, so it comes down to a question of features vs price. Below I’ve listed the most important features of the available boards side-by-side to help you make the right decision for yourself or your company. I’ll also go into what I think of each board before we look at the boards in terms of their popularity.

Update 2014-08-06: This tutorial is now available in a Vivado version - Using the AXI DMA in Vivado

One of the essential devices for maximizing performance in FPGA designs is the DMA Engine. DMA stands for Direct Memory Access and a DMA engine allows you to transfer data from one part of your system to another. The simplest usage of a DMA would be to transfer data from one part of the memory to another, however a DMA engine can be used to transfer data from any data producer (eg. an ADC) to a memory, or from a memory to any data consumer (eg. a DAC). In older systems, the processor would handle all data transfers between memories and devices. As the complexity and speed of systems increased over time, this method obviously was not sustainable. DMA was invented to remove the bottleneck and free up the processor from having to deal with transferring data from one place to another. In high performance digital and FPGA systems, the data throughput is typically way too high for the processor to deal with, so a DMA is essential.

In the previous tutorial titled Creating a project using Base System Builder, we used Xilinx Platform Studio (EDK) to create a hardware design (bitstream) for the Zynq SoC. In this tutorial, we will complete the design by writing a software application to run on the ARM processor which is embedded in the Zynq SoC. Using the Xilinx SDK, we’ll create a simple application that will send the words “hello world” out of the serial port and into your PC serial console. In the next tutorials, we’ll write some applications that will interact with the peripherals we defined in the EDK project.

I know I’ve gone through the Base System Builder many times before but I’m writing a few more advanced tutorials for version 14.7 and they all need a starting point. So in this post we will use the handy Base System Builder of the Xilinx Platform Studio (EDK) to put together a simple project for the ZC706 evaluation board.

Requirements

You will need the following :

• Xilinx ISE Design Suite 14.7

Create the Project

Follow these steps to create the project:

I ran into a problem on the JTAG boundary scan and after hours of googling and probing with my oscilloscope, I finally came across a solution.

Firstly I should say that if you are having a JTAG problem with this board, make sure that your DIP switch settings are right. There are two DIP switches (SW11 and SW4) that should be set correctly for your particular JTAG setup. If you are using a USB cable plugged into the slot labelled “JTAG” on the faceplate of the ZC706, you should use the settings 00000 for SW11 and 01 for SW4. If you are using a Platform USB programmer connected to J3, you need to use 00000 for SW11 and 10 for SW4.

I just received the Zynq-7000 based ZC706 development board from a new client and I’m pretty excited to start working on it. This is the first time that I’ll be working on the Zynq FPGA, part of the latest series 7 devices from Xilinx, so over the next few days, I’ll be writing about my experiences while getting familiar with the board, the FPGA and version 14.5 of the Xilinx development tools. If I get time later, I might dive into the new Vivado Design Suite, promoted by Xilinx to be a “revolutionary IP-centric and system-centric design environment for dramatically faster integration and implementation” - we’ll see about that.