Rick Merritt wrote an interesting article on EETimes titled Red Hat Drives FPGAs, ARM Servers. It seems that Red Hat and the major FPGA vendors are going to get together in March to work out a standard software interface for FPGA accelerator boards. The success of high-level synthesis tools in recent years has re-ignited interest in FPGA-based hardware accelerators, as development times on FPGA hardware has seen massive reductions thanks to OpenCL and Vivado HLS, among others. Typically, these kinds of accelerators are PCI Express boards but the OS usually talks to them through a custom interface, which depends on the application and the algorithms being implemented on the FPGA. This obligates the software designers to know the hardware in detail, in order to code the drivers and applications to exploit the accelerators. So Red Hat, the open-source software company, is basically pushing for some abstraction to make the accelerators easier to code for. The idea is simple: design the accelerators with a standard interface and hide the hardware implementation details behind it.

A standard interface for FPGA hardware accelerators would make them more competitive vs GPUs, which typically come with their own drivers. It also makes sense from a design perspective that the details of the implementation of the accelerator should be hidden from the software designer through a standard interface. I think it’s a step in the right direction and I’m looking forward to seeing what they come up with.

Jeff is passionate about FPGAs, SoCs and high-performance computing, and has been writing the FPGA Developer blog since 2008. As the owner of Opsero, he leads a small team of FPGA all-stars providing start-ups and tech companies with FPGA design capability that they can call on when needed.

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