KC705 Evaluation Board

Gigabit Ethernet can be a very useful medium for transferring data very quickly from one point to another. It’s low-cost, high-bandwidth, well established technology and the cabling is easily obtained and installed. In embedded applications however, the throughput of Ethernet links is often held back by one thing: the processor. When using an FPGA, we can relieve the processor significantly by offloading work to the FPGA fabric, but often the only way to exploit the full potential of a Gigabit Ethernet link is to do away with the processor altogether. [Read More]

I’ve been totally overloaded with projects in the last couple months but I’m back with some really exciting news today. A few months back a company called IntelliProp, based in Colorado, released a NVMe Host Accelerator IP core for interfacing FPGAs with NVMe SSDs. This IP core allows reads and writes to be performed directly from the FPGA fabric, without the latency overhead of an operating system (read about the NVMe speed tests I did under PetaLinux). [Read More]

With FPGA Drive we can connect an NVM Express SSD to an FPGA, but what kind of real-world read and write speeds can we achieve with an FPGA? The answer is: it depends. The R/W speed of an SSD depends as much on the SSD as it does on the system it’s connected to. If I connect my SSD to a 286, I can’t expect to get the same performance as when it’s connected to a Xeon. [Read More]

This is the final part of a three part tutorial series on creating a PCI Express Root Complex design in Vivado and connecting a PCIe NVMe solid-state drive to an FPGA. Part 1: Microblaze PCI Express Root Complex design in Vivado Part 2: Zynq PCI Express Root Complex design in Vivado Part 3: Connecting an SSD to an FPGA running PetaLinux (this tutorial) In this final part of the tutorial series, we’ll start by testing our hardware with a stand-alone application that will verify the status of the PCIe link and perform enumeration of the PCIe end-points. [Read More]

This is the first part of a three part tutorial series in which we will go through the steps to create a PCI Express Root Complex design in Vivado, with the goal of being able to connect a PCIe end-point to our FPGA. We will test the design on hardware by connecting a PCIe NVMe solid-state drive to our FPGA using the FPGA Drive adapter. Part 1: Microblaze PCI Express Root Complex design in Vivado (this tutorial) [Read More]

Bring-up of the first FPGA Drive with the Kintex-7 KC705 Evaluation board went nice and smoothly today. In the photo below you’ll see the KC705 and FPGA Drive adapter which is loaded with a Samsung V-NAND 950 Pro. The solid-state drive is an M.2 form factor, NVM Express, 4-lane PCI Express drive with 256GB of storage. A little intro to NVM Express. NVM Express or NVMe is an interfacing specification for accessing SSDs over a PCI Express bus. [Read More]

One of my most common customer requests is to speed up execution of a software application using FPGA hardware acceleration. If the application runs on a PC or server, you can achieve impressive performance gains by using off-the-shelf FPGA development boards for PCI Express. Here is a comparison of the available 7 Series FPGA boards for PCI Express applications: AC701 Artix-7 KC705 Kintex-7 VC707 Virtex-7 VC709 Virtex-7 $1295 $1695 $3495 $4995 XC7A200T-2FBG676C XC7K325T-2FFG900C XC7VX485T-2FFG1761 XC7VX690T-2FFG1761C 4-lane Gen2 PCIe 8-lane Gen2 PCIe 8-lane Gen2 PCIe 8-lane Gen3 PCIe 1GB DDR3 SODIMM 1GB DDR3 SODIMM 1GB DDR3 SODIMM 4GB DDR3 SODIMM x2 8Kb EEPROM 8Kb EEPROM 8Kb EEPROM 1KB EEPROM No BPI Flash 128MB BPI Flash 128MB BPI Flash 32MB BPI Flash 32MB Quad SPI 16MB Quad SPI 16MB Quad SPI No Quad SPI Flash SD Card slot SD Card slot SD Card slot No SD No LPC FMC 1x LPC FMC No LPC FMC No LPC FMC 1x HPC FMC (*) 1x HPC FMC (*) 2 x HPC FMC 1x HPC FMC (*) 1x SFP 1x SFP+ 1x SFP+ 4x SFP/SFP+ 1GB Ethernet 1GB Ethernet 1Gb Ethernet No Ethernet No USB No USB No USB No USB UART over USB UART over USB UART over USB UART over USB HDMI out HDMI out HDMI out No Video XADC header XADC header AMS port No Analog (*) Note: These HPC FMC connectors are only partially populated which means that they wont be able to support all standard FMCs. [Read More]