A tech blog on FPGA design by Jeff Johnson, maker of the Ethernet FMC and FPGA Drive.

List of PYNQ projects and ports

PYNQ enables huge productivity gains by making it possible to program the Zynq-7000 SoC with a high-level programming language (Python) and leverage the power of FPGA hardware acceleration with ease. Xilinx first designed PYNQ to target the PYNQ-Z1 board but it wasn't...

PYNQ Computer Vision demo: 2D filter and dilate

See what the PYNQ-Z1 and the PYNQ Computer Vision overlay are capable of doing with a 720p standard HD video stream. In the video we run a 2D filter and dilate function on the incoming video, first using the Python OpenCV...

How to accelerate a Python function with PYNQ

This video demonstrates how you would typically go about accelerating a Python function or algorithm on the Zynq-7000 with PYNQ. The function I chose to base this video on is the Finite Impulse Response (FIR) filter because...

Create a custom PYNQ overlay for PYNQ-Z1

In this video tutorial we create a custom PYNQ overlay for the PYNQ-Z1 board. Probably the simplest PYNQ overlay possible, it contains one custom IP (an adder) with an AXI-Lite interface and three registers accessible over...

Python for the Zynq and the PYNQ-Z1

Being a big fan of Python, for ages I've wanted to explore the possibilities of running Python on the Zynq. Thankfully Xilinx and Digilent saw the value in this too and they developed the PYNQ-Z1 and more importantly the...

IntelliProp Demos NVMe Host Accelerator on FPGA Drive

Early this year IntelliProp released a demo video of their NVMe Host Accelerator IP core running on the Intel Arria 10 GX FPGA Development board. As you can see in the video, they are using Opsero's FPGA Drive product with...

PetaLinux for Artix-7 Arty Base Project

In the final part of the Arty base project tutorial, we build a PetaLinux project that's tailored to our Arty base design. Then we boot PetaLinux on our hardware and verify that we have network connectivity by checking the...

Artix-7 Arty Base Project

https://www.youtube.com/watch?v=8lrA5vrWgfo Here's a base project for the Arty board based on the Artix-7 FPGA. The Arty is a nice little dev board because it's low cost ($99 USD) but it's still got enough power and...

Creating a custom AXI-Streaming IP in Vivado

The AXI-Streaming interface is important for designs that need to process a stream of data, such as samples coming from an ADC, or images coming from a camera. In this tutorial, we go through the steps to create a custom IP...

Quick look at the UltraZed-EG SoM

In this video I take a look at the features of the UltraZed-EG System-on-Module and the Zynq UltraScale+ MPSoC. As is typical for Avnet products, it's a great deal with a price tag of only $485 USD, when the device alone...

Getting Started with the MYIR Z-turn

In this video I create a simple Vivado design for the MYIR Z-turn Zynq SoM and we run a hello world application on it, followed by the lwIP echo server. We connect the Z-turn to a network, then we use "ping" and "telnet" to...

Using AXI DMA in Vivado Reloaded

The DMA is one of the most critical elements of any FPGA or high speed computing design. It allows data to be transferred from source to memory, and memory to consumer, in the most efficient manner and with minimal...

Demo of Intelliprop’s NVMe Host Accelerator IP core

I've just done a video to demo Intelliprop's NVMe Host Accelerator IP core on the Xilinx Kintex Ultrascale KCU105 dev board and the Samsung 950 Pro M.2 NVMe SSD. To connect them together I've used the FPGA Drive FMC plugged...

A quick look at the Kintex Ultrascale KCU105

I've got the Kintex Ultrascale Development Kit on my desk today so it's a good time to take a look inside and see what's special about this board. The Ultrascale (20nm) and Ultrascale+ (16nm) FPGAs are taking over from the Series-7 devices (28nm), and I've seen more...

Tcl Automation Tips for Vivado and Xilinx SDK

Tcl automation is one of the most powerful features integrated into the Vivado and Xilinx SDK tools and should be fully exploited to maximize your productivity as an FPGA developer. In this post I've put together a "cheat sheet" of some of the most useful commands and...

NVMe Host IP tested on FPGA Drive

I've been totally overloaded with projects in the last couple months but I'm back with some really exciting news today. A few months back a company called IntelliProp, based in Colorado, released a NVMe Host Accelerator IP core for interfacing FPGAs with NVMe SSDs....

FPGA Drive now available to purchase

Orders can now be placed for the FPGA Drive products on the Opsero website. Both the PCIe and FMC versions allow you to connect an M.2 PCIe solid-state drive to an FPGA development board and both can be purchased at the same price of $249 USD (solid-state drive not...

Micron’s new M.2 Solid-State Drive

Computer memory giant, Micron, sent me a pre-production sample of their brand new M.2 NVMe solid-state drive. I tested it under PetaLinux on the PicoZed FMC Carrier Card V2 and the FPGA Drive adapter, and as expected, it passed all tests with flying colours. Although...

M.2 NGFF Loopback Module

Half the fun of making cool stuff is sharing it with others. The photos I'm sharing in this post are of my new M.2 NGFF loopback module - it's a M.2 form-factor module with a loopback on each of the 4 PCIe lanes, as well as some electronics to test other connections...

Measuring the speed of an NVMe PCIe SSD in PetaLinux

With FPGA Drive we can connect an NVM Express SSD to an FPGA, but what kind of real-world read and write speeds can we achieve with an FPGA? The answer is: it depends. The R/W speed of an SSD depends as much on the SSD as it does on the system it's connected to. If I...

At last! Affordable and fast, non-volatile storage for FPGAs

Let me introduce you to Opsero's latest offering: FPGA Drive FMC, a new FPGA Mezzanine Card that allows you to connect an NVMe PCIe solid-state drive to your FPGA. There's got to be a better way. In the past, if you were developing an FPGA based product that needed a...

Bye bye Platform Cable USB II, Hello JTAG HS3

Now that I think about it, I've been using my Xilinx Platform Cable USB II for 10 years now!!! That's a terrific run in my opinion, I got it in a kit for the Virtex-5 ML505 board in 2006 and I would have kept using it if I didn't start getting these strange error...

Breakout the Zynq Ultrascale+ GEMs with Ethernet FMC

Did you know that the Zynq Ultrascale+ has 4 built-in Gigabit Ethernet MACs (GEMs)? That makes it awesome for Ethernet applications which is why I've just developed and shared an example design for the Zynq Ultrascale+ ZCU102 Evaluation board, armed with an Ethernet...

FMC for Connecting an SSD to an FPGA

Here's a first look at the FMC version of the FPGA Drive product, featured with the Samsung VNAND 950 Pro SSD. The FMC version can carry M-keyed M.2 modules for PCI Express and is designed to support up to 4-lanes. It has a HPC FMC connector which can be used on a LPC...

Multi-port Ethernet in PetaLinux

Many FPGA-based embedded designs require connections to multiple Ethernet devices such as IP cameras, and control of those devices under an operating system, typically Linux. The development of such applications can be accelerated through the use of development boards...

Connecting an SSD to an FPGA running PetaLinux

This is the final part of a three part tutorial series on creating a PCI Express Root Complex design in Vivado and connecting a PCIe NVMe solid-state drive to an FPGA. Part 1: Microblaze PCI Express Root Complex design in Vivado Part 2: Zynq PCI Express Root...

Zynq PCI Express Root Complex design in Vivado

This is the second part of a three part tutorial series in which we will create a PCI Express Root Complex design in Vivado with the goal of connecting a PCIe NVMe solid-state drive to our FPGA. Part 1: Microblaze PCI Express Root Complex design in Vivado Part...