A tech blog on FPGA design by Jeff Johnson, maker of the Ethernet FMC and FPGA Drive.

Demo of Intelliprop’s NVMe Host Accelerator IP core

I've just done a video to demo Intelliprop's NVMe Host Accelerator IP core on the Xilinx Kintex Ultrascale KCU105 dev board and the Samsung 950 Pro M.2 NVMe SSD. To connect them together I've used the FPGA Drive FMC plugged...

A quick look at the Kintex Ultrascale KCU105

I've got the Kintex Ultrascale Development Kit on my desk today so it's a good time to take a look inside and see what's special about this board. The Ultrascale (20nm) and Ultrascale+ (16nm) FPGAs are taking over from the Series-7 devices (28nm), and I've seen more...

Tcl Automation Tips for Vivado and Xilinx SDK

Tcl automation is one of the most powerful features integrated into the Vivado and Xilinx SDK tools and should be fully exploited to maximize your productivity as an FPGA developer. In this post I've put together a "cheat sheet" of some of the most useful commands and...

NVMe Host IP tested on FPGA Drive

I've been totally overloaded with projects in the last couple months but I'm back with some really exciting news today. A few months back a company called IntelliProp, based in Colorado, released a NVMe Host Accelerator IP core for interfacing FPGAs with NVMe SSDs....

FPGA Drive now available to purchase

Orders can now be placed for the FPGA Drive products on the Opsero website. Both the PCIe and FMC versions allow you to connect an M.2 PCIe solid-state drive to an FPGA development board and both can be purchased at the same price of $249 USD (solid-state drive not...

Micron’s new M.2 Solid-State Drive

Computer memory giant, Micron, sent me a pre-production sample of their brand new M.2 NVMe solid-state drive. I tested it under PetaLinux on the PicoZed FMC Carrier Card V2 and the FPGA Drive adapter, and as expected, it passed all tests with flying colours. Although...

M.2 NGFF Loopback Module

Half the fun of making cool stuff is sharing it with others. The photos I'm sharing in this post are of my new M.2 NGFF loopback module - it's a M.2 form-factor module with a loopback on each of the 4 PCIe lanes, as well as some electronics to test other connections...

Measuring the speed of an NVMe PCIe SSD in PetaLinux

With FPGA Drive we can connect an NVM Express SSD to an FPGA, but what kind of real-world read and write speeds can we achieve with an FPGA? The answer is: it depends. The R/W speed of an SSD depends as much on the SSD as it does on the system it's connected to. If I...

At last! Affordable and fast, non-volatile storage for FPGAs

Let me introduce you to Opsero's latest offering: FPGA Drive FMC, a new FPGA Mezzanine Card that allows you to connect an NVMe PCIe solid-state drive to your FPGA. There's got to be a better way. In the past, if you were developing an FPGA based product that needed a...

Bye bye Platform Cable USB II, Hello JTAG HS3

Now that I think about it, I've been using my Xilinx Platform Cable USB II for 10 years now!!! That's a terrific run in my opinion, I got it in a kit for the Virtex-5 ML505 board in 2006 and I would have kept using it if I didn't start getting these strange error...

Breakout the Zynq Ultrascale+ GEMs with Ethernet FMC

Did you know that the Zynq Ultrascale+ has 4 built-in Gigabit Ethernet MACs (GEMs)? That makes it awesome for Ethernet applications which is why I've just developed and shared an example design for the Zynq Ultrascale+ ZCU102 Evaluation board, armed with an Ethernet...

FMC for Connecting an SSD to an FPGA

Here's a first look at the FMC version of the FPGA Drive product, featured with the Samsung VNAND 950 Pro SSD. The FMC version can carry M-keyed M.2 modules for PCI Express and is designed to support up to 4-lanes. It has a HPC FMC connector which can be used on a LPC...

Multi-port Ethernet in PetaLinux

Many FPGA-based embedded designs require connections to multiple Ethernet devices such as IP cameras, and control of those devices under an operating system, typically Linux. The development of such applications can be accelerated through the use of development boards...

Connecting an SSD to an FPGA running PetaLinux

This is the final part of a three part tutorial series on creating a PCI Express Root Complex design in Vivado and connecting a PCIe NVMe solid-state drive to an FPGA. Part 1: Microblaze PCI Express Root Complex design in Vivado Part 2: Zynq PCI Express Root...

Zynq PCI Express Root Complex design in Vivado

This is the second part of a three part tutorial series in which we will create a PCI Express Root Complex design in Vivado with the goal of connecting a PCIe NVMe solid-state drive to our FPGA. Part 1: Microblaze PCI Express Root Complex design in Vivado Part...

Microblaze PCI Express Root Complex design in Vivado

This is the first part of a three part tutorial series in which we will go through the steps to create a PCI Express Root Complex design in Vivado, with the goal of being able to connect a PCIe end-point to our FPGA. We will test the design on hardware by connecting a...

FPGA Drive Board Bring-up

Bring-up of the first FPGA Drive with the Kintex-7 KC705 Evaluation board went nice and smoothly today. In the photo below you'll see the KC705 and FPGA Drive adapter which is loaded with a Samsung V-NAND 950 Pro. The solid-state drive is an M.2 form factor, NVM...

A first peek at FPGA Drive

With the first prototypes on the way, it's time to take a closer look at what exactly FPGA Drive is and how it can help you to develop new disruptive technologies with FPGAs and SSDs. Here's what you need to know in 3 points: FPGA Drive enables you to connect a...

ZynqBoard: The World’s Smallest Zynq SoM

Almost a year ago I did a comparison of Zynq SoMs, or System-on-Modules, these handy little Zynq-based devices that speed up your product development by taking the risk out of your PCB design and often handing you a ton of working example code. Well there have been...

Xilinx reveals Virtex Ultrascale Board for PCI Express applications

Xilinx just released a video presenting the next-generation of All Programmable devices and dev environments. It's a quick look at where technology is going and particularly where FPGAs are going to make their mark. Of particular interest to me were the images of a...

FPGA accelerators to get a standard software interface

Rick Merritt wrote an interesting article on EETimes titled Red Hat Drives FPGAs, ARM Servers. It seems that Red Hat and the major FPGA vendors are going to get together in March to work out a standard software interface for FPGA accelerator boards. The success of...

Unboxing Samsung V-NAND SSD 950 Pro M.2 NVM Express

Very excited to be showing off my new Samsung SSD 950 in the M.2 form factor. This tiny solid-state drive has a PCI Express Gen3 x 4-lane interface for a more direct connection to the CPU which enables a much higher throughput than a SATA interface. According to...

QuickPlay reinvents FPGA design

Since their invention, FPGAs have been burdened by a problem that has held them back from more widespread adoption: they're too hard to program. Xilinx knows this, which is why they spent hundreds of millions of dollars developing the Vivado Design Suite and more...

Running a lwIP Echo Server on a Multi-port Ethernet design

Tutorial Overview This tutorial is the follow-up to Using AXI Ethernet Subsystem and GMII-to-RGMII in a Multi-port Ethernet design. In this part of the tutorial we will generate the bitstream, export the hardware description to the SDK and then test the echo server...

PicoZed Unboxing

I recently got myself a PicoZed 7Z030 SoM (system-on-module) so that I could start developing more resource intensive applications for the Ethernet FMC, such as network tapping and network latency measurement. Why would I use a SoM for this? Checkout my comparison of...

FPGA Network tap: Designing the Ethernet pass-through

When designing a network tap on an FPGA, the logical place to start is the pass-through between two Ethernet ports. In this article, I'll discuss a convenient way to connect two Ethernet ports at the PHY-MAC interface, which will form the basis of a network tap. The...

ARTY: The $99 Artix-7 FPGA eval kit

I just got the news about the new ARTY $99 FPGA evaluation kit being released and I thought it was worth a mention. At the $99 price point and with the Arduino shield connector, they'll attract a lot of hobbyists who can now hook up one of the many existing Arduino...