Update Kria Boot Firmware
Posted on November 11, 2022
| Jeff Johnson
In the previous post we setup the Kria KV260 Vision AI Starter Kit for PYNQ under Ubuntu 20.04.3. Now we would like to update our Kria SoMs boot firmware so that we can boot the newer Ubuntu 22.04 and use the latest PYNQ release for Kria. In this post we’ll go through the steps for updating the boot firmware of your Kria SoM.
Just for clarity, the table below shows the Kria Ubuntu images that are currently available and the version of boot firmware that is required to boot them.
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Setup PYNQ on the Kria KV260 Vision AI Starter Kit
Posted on November 10, 2022
| Jeff Johnson
In this post we’re going to setup the Kria KV260 Vision AI Starter Kit for use with PYNQ. For other platforms like the PYNQ-Z1, the PYNQ setup is quite simple: we download a disk image file for the version of PYNQ that we want to use and we just burn that image onto our SD card. For the Kria, it’s a bit different and unfortunately it’s a bit more complicated, at least it is at the moment I write this post.
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Comprehensive list of FPGA development boards
Posted on October 17, 2022
| Jeff Johnson
Update 2022-10-19: I’m aware that I have some work to do to get the boards from Intel, Lattice, Efinix and other FPGA vendors into these lists. All I can say is that I’m working on it! I also ended up with a lot of emails from people wanting to get certain dev boards added to the lists so I’ve made it easier for you (and me) to do that. If you have a board that you would like to list, please submit the details to me and I will put it up in a day or so.
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M2 SSD-to-FPGA adapter supports Gen4 PCIe
Posted on December 20, 2021
| Jeff Johnson
One of the projects I’ve been working on in the last few months has been upgrading our M2 SSD to FPGA adapter product (FPGA Drive FMC) to support the new Gen4 PCIe SSDs. It’s now available to buy so I thought that I would share some photos and write a bit about the changes that we made. The photos were taken with these two Gen4 PCIe SSDs:
Corsair Force Series MP600 1TB Gen4 PCIe NVMe M.
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Processorless Ethernet: Part 3
State machine based Ethernet on FPGA
Posted on May 1, 2021
| Jeff Johnson
For those of you who want to experiment with processorless Ethernet on FPGAs, I’ve just released a 4-port example design that supports these Xilinx FPGA development boards:
Artix-7 AC701 Evaluation board Kintex-7 KC705 Evaluation board Kintex Ultrascale KCU105 Evaluation board Virtex-7 VC707 Evaluation board Virtex-7 VC709 Evaluation board Virtex UltraScale VCU108 Evaluation board Virtex UltraScale+ VCU118 Evaluation board Here’s the Git repo for the project: Processorless Ethernet on FPGA
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Processorless Ethernet: Part 2
Modularizing the TEMAC example design
Posted on April 20, 2021
| Pablo Trujillo
This article was written by Pablo Trujillo, an FPGA developer and consultant based in Valencia, Spain; a place that I happen to be very fond of, because of the many tapas bars and good eating/drinking to be done there. Pablo writes his own blog on FPGAs called Control Paths and he’s also a very active contributor to Hackster.io. In this article, Pablo explains how he has helped me to modularize the TEMAC example design that we looked at in an earlier post.
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PetaLinux build artifacts
How to keep them and where to find them
Posted on March 25, 2021
| Jeff Johnson
These tips apply to PetaLinux 2020.2. To save disk space, the PetaLinux tools deletes all build artifacts at the end of the build process. If you want to keep them for debugging or to help you develop a patch, you can add the following line to the project-spec/meta-user/conf/petalinuxbsp.conf file:
RM_WORK_EXCLUDE += "recipe" Where recipe must be substituted with a valid recipe name such as the following:
Sources Recipe name Kernel linux-xlnx FSBL fsbl U-Boot u-boot-xlnx PMU firmware pmu-firmware Device tree device-tree If you want to preserve the build artifacts of more than one component, you can append the recipe names, separated by spaces, for example, to preserve the kernel sources and the FSBL:
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Driving Ethernet ports without a processor
How to do it on an FPGA and why
Posted on February 16, 2021
| Jeff Johnson
Gigabit Ethernet can be a very useful medium for transferring data very quickly from one point to another. It’s low-cost, high-bandwidth, well established technology and the cabling is easily obtained and installed. In embedded applications however, the throughput of Ethernet links is often held back by one thing: the processor. When using an FPGA, we can relieve the processor significantly by offloading work to the FPGA fabric, but often the only way to exploit the full potential of a Gigabit Ethernet link is to do away with the processor altogether.
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How to program configuration flash with Vivado Hardware Manager
Writing an .mcs file to Quad SPI or Linear BPI flash
Posted on January 18, 2021
| Jeff Johnson
Most FPGA/SoC dev boards have a flash device for non-volatile storage. Typically it would be either a Quad SPI flash (serial interface) or a Linear BPI flash (parallel interface). Although it can be used for storing anything, it’s typically used for storing the configuration for the FPGA or SoC (eg. the bitstream, FSBL, U-Boot, Linux Kernel). If the boot mode of the FPGA or SoC is appropriately set, on power-up it should read from the flash, load the bitstream into the FPGA and then load and run the software components.
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How to Modify U-Boot Environment Variables in PetaLinux
Posted on January 13, 2021
| Jeff Johnson
In this post we will look at two methods for modifying the U-Boot environment variables. The first method is changing the values stored in flash from the UBoot command prompt. The second method is changing the hard-coded default values in the PetaLinux project. We’ll be assuming a boot from QSPI flash, although the concepts also apply to booting from SD card or other non-voltatile storage devices.
The U-Boot environment variables determine exactly how a board is supposed to boot.
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